1.
Bensikaddour EH, Boutte A. Motor speed control using a fault tolerance implementation on SRAM-based FPGA. Alger. J. Eng. Technol. [Internet]. 2023Dec.28 [cited 2025Jan.20];8(2):302-8. Available from: http://www.jetjournal.org/index.php/ajet/article/view/301